This is a list of questions that are frequently being asked by people around FPGA community. If you have any questions that are not listed below, feel free to contact :
- 📬firstname.lastname@example.org for any question.
FPGA mining is a very efficient and fast way to mine, compared to GPU mining and drastically outperforms CPU mining. FPGAs typically consume small amounts of power with relatively high hash ratings, making them more viable and efficient than GPU mining.
Let’s take a look at the following comparison table:
Looks like FPGAs have an advantage over GPUs and ASICs in only 2 of the 5 categories, but some consider these to be the more important in current market situation. If you can switch between different algorithms and mine the most profitable coins, you can guarantee yourself a high ROI.
The problem is with the other two categories, user friendly and availability. To map designs on an FPGA an engineer uses a Hardware Description Language (HDL), the most popular being VHDL and Verilog. What programmers do is they write a Bitstream — program that tells the FPGA what to do and then load it on the FPGA board.
Technically, yes, it can. But for Bitcoin, ASIC is already there, so it would make no sense for FPGA to compete with ASIC because ASIC would be a lot faster than FPGA. For Ethereum, ETH PoW algorithm (Ethash) is memory intensive (requires a lot of memory) then FPGA is not suitable because FPGA is core intensive, FPGA hashing speed would be around GPU hashing speed. But, FPGA with HBM can mine Ethereum faster than GPU because HBM allows the accelerators to perform memory-bound compute tasks much faster than existing technology while consuming much less power than external DRAM.
An FPGA bitstream is a file that contains the programming information for an FPGA. This bitstream is typically provided by the hardware designer who creates the embedded platform. Programming an FPGA is the process of loading a bitstream into the FPGA. Bitstream needs to be uploaded to FPGA through Vivado/NextJTAG/Minerator in order to start mining.
- Miner Program
A binary file or a CPU side program that is used to communicate between pool and FPGA. Similar as miner program for GPU, but instead of talking to GPU the miner program here is talking to FPGA.
As more and more miners competed for the limited supply of blocks, individuals found that they were working for months without finding a block and receiving any reward for their mining efforts. To address the variance in their income miners started organizing themselves into pools so that they could share rewards more evenly.
Currently, there are a few developers that have released their bitstreams to the public. They are, 🔥whitefire990, ⛏Allmine, 🎅🏼DedMaroz, 🏎Ruplikmastik, 🌐Altered-Silicon, and 🐺Stark0224. You can download their bitstreams on the Downloads page.
Currently, only VU9P series (VCU1525, BCU1525, BTU9P, ECU200, etc) and CVP-13 are using DNA. Here is the easiest way to get your device DNA:
- Download NextJTAG.
./nextjtagor nextjtag.exe on your terminal.
- You can get your device's DNA(s).
Note: DNAs usually start with 40020xxxxxxx
There are several ways to cool your FPGA, they are:
We wrote another article on our recommended setup system: 👉Recommended Water Cooling System.
Water block is a tool for cooling your FPGA, and falls under Water Cooling. You can read more on how to install the water block : 👉Heat Control - VCUs & BCUs - Part 1.
You can source the components from several stores. However, FPGA.guide provides you with an All-in-1 Water Cooling kit that has all the components you need. You can buy it at 🛒FPGA.guide Shop. It's compatible with the BCU1525, CVP-13, BTU9P, XUPVV4-VU9, and MA-X1.
The DC1613A Cable Adapter is for 🔌Modifying your FPGA's VCC. Before using a DC1613A cable, we recommend reading how to do it here 👉How to Modify FPGA's Voltage Using DC1613A. You can buy one in 🛒FPGA Guide Shop.
You need a PSU that can push out at least 350W per VCU on the 12V rails. A high-quality PSU 1200W (like HP Server) is fine, but most generic 12/1300W only have 90-100A 12v - and can't handle the power on current onrush. The BCU is more tolerant on this than the VCU due to additional bulk capacitance on the 12v. Keep in mind that a 1300W PSU cannot generate 1300w on the 12V rail, 1300W is the power capacity across all voltage rails.
Also, make sure that you read the PSU rating and how many watts it is rated for. Some of those server PSUs are "1200W at 240V" but only 900W at 120V (or don't run on 120V at all). Ensure the unit you're grabbing will remain at the power rating you require on the voltage you can supply to it. Also give it a fan that blows into it on the breakout-board side, unless you open it and reverse the fan. They can get much warmer under load.
As of right now, there are no bitstreams that require the full 16 lanes per FPGA or even more than 1x (What risers do right now). You can use any motherboard that you want, as long as they work with risers. Or check out our recommendation in 🏃Quick Start Page.
"... If you want to future-proof your rigs to have support for x16 electrical and physical (directly inserting them into the motherboard) then you need to start looking at more expensive, beefier motherboards that support threadripper CPUs which have 60+4 PCIe lanes, the board would only allow you to run 3 boards at full x16 speeds, or up to 4-5 boards at 8x. I have not seen any boards that would let you fit more than 4 or 5 FPGAs." - Dream
Each core can only support 2-3 FPGA boards. We recommend dual-core for 5-6 FPGAs & quad-core for 8+.
"I strongly recommend using something better than a Celeron CPU to run more than 1-2 cards as you will probably overwhelm the CPU. A Celeron will work but with more cards, it will bottleneck your miners and you will see a noticeable hash rate decrease. Generally speaking, you should be pairing a maximum of 2 BCUs/VCUs per CPU Core (1 card/thread)." - Dream